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Install K8S on VM and spring boot integration.

Installation Environment Vmware Workstation pro  It is recommended to use the  snapshot  to store the state of each installation stage to avoid installation failures and causing the installation to start from scratch. Ubuntu 22.04 windows 11 Hardware settings  create 3 VM: 4 cores and 4G memory and 100G capacity Before installing K8s (All use the root user) set host: 192.168.47.135 master 192.168.47.131 node1 192.168.47.132 node2 set root ssh connection: sudo su - echo "PermitRootLogin yes" >> /etc/ssh/sshd_config systemctl restart sshd sudo passwd ssh-keygen for i in {master,node1,node2}; do  ssh-copy-id root@$i; done set Ipvs and conf  create conf file: for i in {master,node1,node2}; do ssh root@$i 'cat << EOF > /etc/modules-load.d/containerd.conf overlay br_netfilter EOF'; done execute conf: for i in {master,node1,node2}; do ssh root@$i 'modprobe overlay;modprobe br_netfilter;'; done create 99-kubernetes-cri.conf file: for i in {master,node1,

Memory

Modern operating systems use paging to manage memory. In this process, physical memory is divided into fixed-sized blocks called frames and logical memory into blocks of the same size called pages.

Memory-management unit

  • Hardware devices that map virtual to the physical address.
  • The value in the relocation register is added to every address generated by a user process at the time it is sent to memory.

Logical vs Physical Address

  • Logical address: generated by CPU, a.k.a. virtual address.
  • Physical address:  seen by the memory module.
  • Compile-time & load-time address binding: Logical address = physical address.
  • Execution-time address binding: logical address != physical address.
  • The user program deals with logical addresses; it never sees the real physical address.

Swap

  • A process can be swapped out of memory to a backing store, and later brought back into memory for continuous execution.
  • Backing store: a chunk of the disk, separated from the file system, to provide direct access to these memory images.
  • Swap back memory location.
    • If binding is done at compile/load time: the swap back memory address must be the same.
    • If binding is done at execution time: the swap back memory address can be different.
  • A process to be swapped == must be idle.
  • Imagine a process that is waiting for I/O is swapped.
    • Solutions: 
      • Never swap a process with pending I/O.
      • I/O operations are done through OS buffers.

Paging

  • Method:
    • Divide physical memory into fixed-sized blocks called frames.
    • Divide logical address space into blocks of the same size called page.
    • To run a program of n pages, need to find n free frames and load the program.
    • Keep track of free frames.
    • Set up a page table to translate logical to the physical address.
  • Benefit:
    • Allow the physical-address space of the process to be noncontiguous.
    • Avoid external fragmentation.
    • Limited internal fragmentation.
    • Provide shared memory/pages.

Page table

  • Each entry maps to the base address of a page in physical memory
  • A structure maintained by OS for each process
    • Page table includes only pages owned by a process
    • A process cannot access memory outside its space
  • Paging helps separate the user's view of memory and the actual physical memory
  • User view's memory: one single contiguous space
  • OS maintains a copy of the page table for each process 
  • OS maintains a frame table for managing physical memory
    • One entry for each physical frame
    • Indicate whether a frame is free or allocated
    • If allocated to which page of which process or processes

Implementation of page table

  • Page table is kept in memory.
  • Page-table base register(PTBR).
    • The physical memory address of the page table.
    • The PTBR value is stored in PCB(Process Control Block).
    • Changing the value of PTBR during Context-Switch.
  • With PTBR, each memory reference result in 2 memory read.
    • One for the page table and one for the real address
  • The 2-access problem can be solved by.
    • Translation look-aside buffers(TLB)(HW) which is implemented by Associative memory(HW).
  • Associative memory .
    • All memory entries can be accessed at the same time.
    • Each entry corresponds to an associative register.
      • Parallel search.
  • Translation look-aside buffers(TLB).
    • A cache for page table shared by all processes.
    • TLB must be flushed after a context switch.
      • Otherwise, TLB entry must has a PID field(address-space identifiers(ASIDs)).

Page table memory structure

  • Page table could be huge and difficult to be loaded.
    • Need to break it into several smaller page tables, better within a single page size(i.e. 4KB) or reduce the total size of the page table
  • Solutions:
    • Hierarchical paging.
    • Hash table tables.
    • Inverted page table.

Segmentation

  • Memory-management scheme that supports user view of memory
  • A program is collection of segments.
  • Segmentation hardware:
    • Limit register is used to check offset length.
    • MMU allocate memory by assigning an appropriate base address for each segment.
      • Physical address cannot overlap between segments

Protection & sharing

  • Protection bits associated with segments.
    • Read-only segment (code).
    • Read-write segments(data, heap, stack).
  • Code sharing occurs at segment level.
    • Shared memory  communication.
    • Shared library.
reference:
https://www.amazon.com/-/zh_TW/Operating-System-Concepts-Abraham-Silberschatz/dp/1119800366/ref=sr_1_1?keywords=Operating-System-Concepts&qid=1669538704&s=books&sr=1-1







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